Welcome to the second phase of Power Station firmware

Central power booster or distributed power stations?

The MagicRail system uses distributed power stations with independant current limiting. This eliminates the need for power management after a high current booster,
preventing melting axles in derailments that short circuit the rails.

Each power station also performs occupancy detection, auto-reverse, transponder detection, and ops mode readback.

Matrixing of drivers allows for more blocks per power station. From 4 blocks from a PS02 to 64 blocks from a PS08.
Driver current limits the number of running engines in a matrix, but a large matrix is perfect for a yard or roundhouse.
A 16 stall roundhouse can be powered by one PS04, or part of a PS06 or PS08, with full occupancy and engine location reporting.
Multi-block reversing sections are another area where a matrix works well.

These features eliminate the need for additional sensing equipment and provide for total sensing of the entire layout.

PS8	PS02/04/06/08	General	Images	Schematics
Version 29 memory map Version 30 memory map Version 31 memory map PIC pinout Comparators SV memory layout EEPROM map Product ID 1	Version 01 memory map Version 01 Page 20 Version 01 EEPROM map Comparators PS02 is Product ID 4 SV 1 PS04 is Product ID 5 SV 1 PS06 is Product ID 6 SV 1 PS08 is Product ID 7 SV 1	Transponding OPC_APM DCC state machine 003 DCC state machine 004 DCC decoding graphs DCC by the numbers MagicRail SV memory layout Pin Function Mapping	PS8 original Power Station PS02R0 being tested PS02R0 closeup PS02R01 mechanical drawing PS02R01 major parts assembled PS02R01 wiring completed PS02R01 in test (new PS)	Network Interface 1 Network Interface 2 Network Interface 3 DCC passive network Current / XP sensing Vref Emitter Follower Power Supply and FRAM pullups

About network interfaces

Interface 1 was the original, used by processors like PIC16F628 and PIC16F648 which are not able to invert the transmit output and also have no HLT timers.
Interface 2 was able to remove one transistor and 2 resistors when used with processors that can invert the transmit signal.
Interface 3 is used with modern processors that can invert the transmit signal and have HLT timers, one of which is used to determine when the network is busy.
This removes another transistor, 2 resistors, and a capacitor. The HLT also allows adjusting the timing based on priority and retries.

Goals of phase 2

Sense block occupancy
Sense transponding
Ops mode readback

PS8 is the original power station. It uses 8 pairs of track power drivers to allow for up to 64 matrixed blocks. But it was unable to meet the goal of sensing block occupancy
without upsetting mobile decoders. It can detect transponding, but is hit or miss due to time shared use of one comparator. This also precludes the ability for ops mode readback.
Phase 2 processors use CWG or COG devices to correct the timing to within NMRA specifications. So they can scan the matrix of blocks and accurately determine occupancy.
Dedicated comparators for each pair of track power drivers allow for accurate transponder sensing, and can do ops mode readback.