DCC State Machine 003

DCC State Machine version 003

State 0 is to synchronize on the preamble. It is initiated with DCC_subst set to 20, the minimum number of "1" half cycles for a valid preamble.

Condition	Action	Process	Next state
receive 0 bit	set DCC_subst to 20 (start over)	dca01	0
receive 1 bit	decrement DCC_subst, if now 0 go to state 1	dca02	0 / 1

State 1 waits for the first start (0) bit

Condition	Action	Process	Next state
receive 0 bit	set DCC_subst to 8, go to state 2	dca03	2
receive 1 bit	wait		1

State 2 verifies the second half of a "0" bit

Condition	Action	Process	Next state
receive 0 bit	if DCC_subst == 0 go to state 5, else go to state 3 for next bit	dca06	3 / 5
receive 1 bit	set DCC_subst to 20, go to state 0	dca01	0

State 3 processes the first half of a bit

Condition	Action	Process	Next state
receive 0 bit	assemble "0" bit, decrement DCC_subst, go to state 2 to verify	dca04	2
receive 1 bit	assemble "1" bit, decrement DCC_subst, go to state 4 to verify	dca05	4

State 4 verifies the second half of a "1" bit

Condition	Action	Process	Next state
receive 0 bit	set DCC_subst to 20, go to state 0	dca01	0
receive 1 bit	if DCC_subst == 0 go to state 5, else go to state 3 for next bit	dca07	3 / 5

State 5 looks for EOM or start another byte

Condition	Action	Process	Next state
receive 0 bit	set DCC_subst to 8, go to state 2	dca03	2
receive 1 bit	set EOM, check checksum if used / set DCC_subst to 20 go to state 0	dca00/dca01	0