DCC State Machine version 004

Ops mode readback friendly

State 0

State 0 is to synchronize on the preamble. It is initiated with DCC_subst set to 0.
ConditionActionProcessNext state
receive 0 bitif DCC_subst < 20 set DCC_subst to 0
ELSE set DCC_subst to 8 and go to state 1
dca02
-> dca03
0
1
receive 1 bitincrement DCC_substdca040

State 1

State 1 verifies the second half of a "0" bit
ConditionActionProcessNext state
receive 0 bitif DCC_subst == 0 go to state 4, else go to state 2 for next bitdca072 / 4
receive 1 bitset DCC_subst to 0, go to state 0dca010

State 2

State 2 processes the first half of a bit
ConditionActionProcessNext state
receive 0 bitassemble "0" bit, decrement DCC_subst, go to state 1 to verifydca051
receive 1 bitassemble "1" bit, decrement DCC_subst, go to state 3 to verifydca063

State 3

State 3 verifies the second half of a "1" bit
ConditionActionProcessNext state
receive 0 bitset DCC_subst to 0, go to state 0dca010
receive 1 bitif DCC_subst == 0 go to state 4, else go to state 2 for next bitdca072 / 4

State 4

State 4 looks for EOM or start another byte
ConditionActionProcessNext state
receive 0 bitset DCC_subst to 8, go to state 1dca031
receive 1 bitset EOM, check checksum if used / set DCC_subst to 0 go to state 0dca00 -> dca010
ProcConditionAction
dca00 set EOM, check checksum if enabled. Fallthrough to dca01
dca01 set DCC_subst to 0, go to state 0
dca02DCC_subst < 20
ELSE
set DCC_subst to 0, stay in state 0
fall through to dca03
dca03 set DCC_subst to 8, go to state 1 to verify
dca04 increment DCC_subst, stay in state 0
dca05 assemble 0, decrement DCC_subst, go to state 1 to verify
dca06 assemble 1, decrement DCC_subst, go to state 3 to verify
dca07DCC_subst == 0
ELSE
process byte, go to state 4
go to state 2 for next bit